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Subnanosecond Pixel Rendering with Million Transistor Chips
Nader Gharachorloo, Satish Gupta, Erdem Hokenek, Peruvemba Balasubramanian, Bill Bogholtz, Christian Mathieu, Christos Zoulas
Computer Graphics (Proceedings of SIGGRAPH 88), August 1988, pp. 41--49.

Abstract: An example of work done to speed up displays at the scan-line level. Uses a systolic array of pixel processors. Each SAGE (Systolic Array Graphics Engine) processor handles 256 pixels at a time. Reviewed in [Fuchs 89].

Keyword(s): parallel processing

BibTeX format:

@inproceedings{Gharachorloo:1988:SPR,
  author = {Nader Gharachorloo and Satish Gupta and Erdem Hokenek and Peruvemba Balasubramanian and Bill Bogholtz and Christian Mathieu and Christos Zoulas},
  title = {Subnanosecond Pixel Rendering with Million Transistor Chips},
  booktitle = {Computer Graphics (Proceedings of SIGGRAPH 88)},
  pages = {41--49},
  month = aug,
  year = {1988},
}

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