Fast Ray-Triangle Intersection Computation Using Reconfigurable Hardware
Sung-Soo Kim, Seung-Woo Nam, In-Ho Lee
MIRAGE 2007: Computer Vision/Computer Graphics Collaboration Techniques, March 2007, pp. 70--81.
Abstract: We present a novel FPGA-accelerated architecture for fast collision detection among rigid bodies. This paper describes the design of the hardware architecture for several primitive intersection testing components implemented on a multi-FPGA Xilinx Virtex-II prototyping system. We focus on the acceleration of ray-triangle intersection operation which is the one of the most important operations in various applications such as collision detection and ray tracing. Our implementation result is a hardware-accelerated ray-triangle intersection engine that is capable of out-performing a 2.8 GHz Xeon processor, running a well-known high performance software ray-triangle intersection algorithm, by up to a factor of seventy. In addition, we demonstrate that the proposed approach could prove to be faster than current GPU-based algorithms as well as CPU based algorithms for ray-triangle intersection.
Article URL: http://dx.doi.org/10.1007/978-3-540-71457-6_7
BibTeX format:
@incollection{Kim:2007:FRI,
  author = {Sung-Soo Kim and Seung-Woo Nam and In-Ho Lee},
  title = {Fast Ray-Triangle Intersection Computation Using Reconfigurable Hardware},
  booktitle = {MIRAGE 2007: Computer Vision/Computer Graphics Collaboration Techniques},
  pages = {70--81},
  month = mar,
  year = {2007},
}
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